Power integrity: identifying possible sources of supply noise

September 1st, 2015, Published in Articles: EngineerIT


Thanks to the continued fulfilment of Moore’s Law and the explosion of the affordable microcontroller we all enjoy a wide variety of electronic products packed with ever increasing functionality and features.

These modern feature-rich products require better quality DC power to operate than their predecessors did. One of the burdens that designers of these products face is providing “clean” power to the devices and circuits in their products.

The study of the effectiveness of the delivery of DC power from the output of the DC/DC converters to the gates of devices in the circuits is known as power integrity. Real-time oscilloscopes are commonly used to measure ripple, noise, transient load response and many other power integrity parameters. This article will demonstrate how using an oscilloscope’s fast Fourier transform (FFT) and triggering capabilities can give analytical insight into potential sources of power supply noise.

The problem

The importance of “clean” power has increased proportional to the density and speed of the successive generations of products being designed. DC power rail deviations can be the single biggest source of clock and data jitter in digital systems. This is known as power supply induced jitter (PSIJ). A drop in the power supply to a digital device can decrease the propagation delay through gates in that device resulting in reduced timing margin or even bit failures. As the switching speeds and slew rates of digital devices have increased so has the probability that switching noise will be induced into the power supply. The resulting noise happens at the frequency of the switching current and can easily exceed 1 GHz. Improving energy efficiency or reducing power consumption is another task facing designers. To reduce power density and keep power consumption at acceptable levels designers have reduced DC operating voltages and/or tightened the tolerances on the DC supplies. The challenge facing designers then is to measure ever smaller and faster AC signals riding on top of their DC supplies.

DC power supply noise

Ideally, there wouldn’t be any noise on your DC power supplies. How did it get there?

There is the simple Gaussian noise on the supply that is a result of unavoidable thermal noise — the electronic noise generated by the thermal agitation of electrons. Typically, this is not the largest source of noise.

The dominant sources of noise on DC power supplies are switching noise from the supply itself and noise induced by the switching currents of devices in the circuit which create transient current demands. The noise created by the switching events may appear random in time; however, they tend to be coherent with clocks in the system.

Thinking about the noise on the DC supply as being a combination of “signals”, like supply switching noise and switching current noise, superimposed on the DC supply will make their measurement and analysis easier.

Because of the wide bandwidth of DC power supply noise, individuals measuring this noise often prefer to use an oscilloscope because of its wide bandwidth, ease of use andready availability.

Using the frequency domain for analysis

Using an oscilloscopes FFT capabilities to view signals in the frequency domain can be helpful in identifying sources that contribute to the noise on a supply.

In this example we have a switching DC-to-DC converter converting 5 V to 3,3 V that we will focus on. The switcher operates at 2,8 MHz. Elsewhere on the target there are other circuits powered from 5 V and operating witha 10 MHz clock.

Using the Keysight N7020A power rail probe and S-series oscilloscope we measure the 3,3 V supply. We will also measure the 10 MHz clock at the same time (using a standard passive probe). Fig. 1 shows the results of the 3,3 V supply and clock measurements in the time domain along with a frequency domain view of the 3,3V supply using the oscilloscopes FFT function. From the time domain view of the 3,3 V supply we can see a signal of ~360 ns period which is the remnants of the 2,8 MHz switcher. Comparing the time domain view of the 3,3 V supply with the time domain view of the 10 MHz clock it is not obvious if the digital circuitry is contributing to the noise on the 3,3 V supply.

Fig. 1.Time domain view of 3,3 V supply (top 2 traces) and 10MHz clock (next 2 traces) and frequency domain view of 3,3 V supply.

Fig. 1.Time domain view of 3,3 V supply (top 2 traces) and 10 MHz clock (next two traces) and frequency domain view of 3,3 V supply.

Referring again to Fig.1 and looking at the frequency domain we can clearly see peaks which are related to the 2,8 MHz switcher (and its harmonics) as well as a peak at 10 MHz representing noise related to theclock. Viewing the noise in the frequency domain in addition to the time domain has given us additional insight into the sources of the noise.

Use triggering to view and measure signal components in the supply noise

Using the oscilloscopes FFT function we have been able to conclude that some of the noise on the 3,3 V supply is related to the 10 MHz clock and digital circuitry on the target. Armed with this information the next step that a designer might take is to get some insight into how much of the noise is caused by the 10 MHz clock. Then they can make an informed decision about the value of a redesign aimed at minimising this noise.

Triggering can help to visualise and measure components of supply noise that are coupling into the supply from, and are phase-coherent to, other elements in the system. To demonstrate this we measure the 3,3 V supply and 10 MHz clock simultaneously. Then we setup the oscilloscope to trigger on the rising edge of the 10 MHz clock. Finally, we set the oscilloscopes acquisition mode to analogue averaging. Averaging repeated acquisitions, in this case 1024 acquisitions, will eliminate all of the random noise and other signal components that are not coherent with the clock. The end result will be those portions of the supply noise that are correlated to the 10 MHz clock. The results of this measurement are shown in Fig. 2. Whether it is worth a redesign to minimise or remove the noise in our example is a decision that the designer would make balancing this new information about the noise with the other constraints he faces.

Fig. 2: Triggering on the 10 MHz clock and enabling averaging removes all random noise and signals that are note coherent with the clock. The resulting view is of the noise on the 3,3 V supply that is related to the 10 MHz clock.

Fig. 2: Triggering on the 10 MHz clock and enabling averaging removes all random noise and signals that are not coherent with the clock. The resulting view is of the noise on the 3,3 V supply that is related to the 10 MHz clock.


Tracking down possible sources of DC supply noise is a key step for the power integrity engineer or technician. Once a noise source has been identified, steps can be taken to reduce or eliminate the effect. An oscilloscopes FFT function can be used to help narrow down and identify possible noise sources. Then triggering and averaging can be used to verify that these possible sources are causing supply noise.


Published with permission from Extension Media, 2015.

Contact Steve Alves, Concilium Technologies, Tel 012 678-9200, steve_alves@concilium.co.za

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